1. Field of the Invention
Example embodiments of the present invention relate to phase change memory devices and fabrication methods thereof, for example, phase change memory devices with lower power consumption and fabrication methods thereof.
2. Description of the Related Art
Semiconductor memory devices may be volatile or nonvolatile memory devices according to whether data is retained when powered off. Volatile memory devices include, for example, dynamic random access memories (DRAM), static random access memories (SDRAM), etc. Nonvolatile memory devices include, for example, flash memory devices. Related art memory devices represent logic or binary values “0” or “1” according to whether or not an electric charge is stored therein. In one example, a DRAM may require a higher charge storage capacity because it may need to be refreshed periodically. However, as charge storage capacity increases, so does surface area of a capacitor electrode of the DRAM. This may suppress integration of the DRAM.
In another example, a flash memory cell has a gate pattern including a gate insulating film, a floating gate, a dielectric film and a control gate, which may be sequentially deposited on a semiconductor substrate. Data may be written in or erased from the flash memory cell by tunneling of electric charges through the gate insulating film. To do so, an operating voltage higher than a source voltage may be required, and the flash memory device may need to have an amplifier circuit for generating voltages necessary for the data writing/erasing operations.
An example memory, which may have nonvolatile/random access characteristics, an increased integration degree and/or a simple structure is a phase change memory device using phase change material. The phase change material may become an amorphous state or a crystalline state according to strength of a current (e.g., joule's heat) provided thereto, and the amorphous phase change material may have an electrical conductivity different from that of the crystalline phase change material.
FIG. 1 is an example graph illustrating an operating method of a phase change memory device. The graph of FIG. 1 may describe a method for writing/erasing data to/from a phase change memory cell. In the graph, a horizontal axis represents time and a vertical axis represents a temperature applied to a phase change material film.
Referring to FIG. 1, the phase change material film is phase-changed into an amorphous state when heated during a time period T1 at temperatures higher than its melting temperature Tm and cooled rapidly (curve I). The phase change material film is phase-changed into a crystalline state when heated during a time period T2 at temperatures between a crystallization temperature Tc and the melting temperature Tm, and cooled slowly (curve II). The time period T2 may be longer than the time period T1.
The amorphous phase change material film may have a higher resistance than the crystalline phase change material film. Accordingly, whether data stored in the phase change memory cell is logic “1” or logic “0” may be determined by detecting a current flowing through the phase change material film. The phase change material film may be comprised of a chalcogenide or any other suitable substance having similar or substantially similar properties. For example, the phase change material film may be comprised of a compound containing germanium (Ge), antimony (Sb), tellurium (Te) or any other suitable element, substance or compound having similar, or substantially similar, properties.
FIG. 2 is a schematic sectional view illustrating a structure of a related art phase change memory device.
Referring to FIG. 2, the related art phase change memory device may include a lower electrode 10, an upper electrode 18, a thin phase change material film 16 interposed between the electrodes 10 and 18, and a conductive contact 14 electrically connecting the lower electrode 18 with the phase change material film 16. Sides of the lower electrode 10 and the conductive contact 14 may be formed within (e.g., buried) in an insulation layer 12 and the lower electrode 10 may be electrically connected to a drain (D) region of a transistor 5. The upper electrode 18 may be electrically connected to a bit line (BL). A gate electrode (G) of the transistor 5 may be electrically connected to a word line (WL).
In the example related art phase change memory device of FIG. 2, when a current flows between the lower electrode 10 and the upper electrode 18, a current having flowed through the conductive contact 14 may flow through a contact surface 20 into the phase change material film 16. As a result, a crystalline state of phase change material around the contact surface 20 may change. The strength of the current necessary for changing the state of the phase change material may be proportional to the area of the contact surface 20. For example, the necessary current strength may be decreased as the contact surface area is reduced. However, reduction of the widths and/or areas of contact surfaces of conductive contacts may be limited due to the photolithographic process used to form the conductive contacts. This may result in lesser integration of semiconductor devices.